Patent Amendments ©(Part II of II)

Taiwan IP Updates ĄV March 2026

By Lyndon

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Taiwan Advances Chip Sector Due To National Research Center Support

Taiwan’s National Institutes of Applied Research (NIAR) has introduced an open R&D platform featuring a chip-level packaging technique that eliminates the use of substrates as part of its effort to bolster the country’s advanced packaging ecosystem. NIAR’s Taiwan Semiconductor Research Institute (TSRI) stated that the technique will help shift Taiwan’s competitive edge in the chip industry from manufacturing processes to system integration and application innovation, and that advanced packaging is the key to future AI applications that require chips offering higher performance, higher density, and lower power consumption. The newly unveiled Chip-on-Chip-on-Board (CoCoB) architecture represents a specialized approach compared to Chip-on-Wafer-on-Substrate (CoWos) – one of the most advanced packaging technologies currently used by Taiwan Semiconductor Manufacturing Co. (TSMC). While CoWoS achieves high-density integration of computing chips and high bandwidth memory (HBM) using interposer wafers and substrates, the substrate layer presents challenges in terms of cost, signal transmission distance, and process complexity. In the CoCoB architecture, the interposer chip is directly connected to the circuit board, effectively enhancing integration density and system performance by significantly shortening signal transmission paths. By eliminating substrate costs and reducing process complexity, CoCoB is particularly well-suited for academic institutions and startups to conduct high-flexibility, low-cost heterogeneous integration experiments. As an example of recent IP developments in the computer chip field, the outlook for further patent application growth from TSMC and other businesses looks positive in 2026.

ITRI Invests in New Taiwan Research Center in Hsinchu

The Industrial Technology Research Institute (ITRI) broke ground on a NT 3.77 billion dollar (US 119.47 million dollar) advanced semiconductor research facility at its headquarters in Hsinchu in January, 2026. It is anticipated that it will open in early 2028. Taiwan’s Premier, Cho Jung-tai, said TSMC will be supporting the project by donating three 12-inch high-end process development machines and advising on facility design. He said the collaboration strengthens Taiwan’s semiconductor ecosystem. MOEA Department of Industrial Technology Director General Kuo Chao-Chung said the project has been in planning for two years. The building will feature 8 meter high ceilings, 2 ton per square meter load capacity, and an independent seismic-resistant structure. The facility will host advanced process and sensor chip pilot lines, an advanced packaging line, and metrology and verification labs. The facility will focus on design innovation, advanced semiconductor process development, and equipment and materials verification. It is expected to help companies cut development time by roughly 30%. There is expected to be a knock on effect with IP development and innovation to follow.

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